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ADuC7060
32-BIT LOAD
32.768kHz OSCILLATOR
CORE CLOCK
FREQUENCY/CD
CORE
CLOCK
EXTERNAL 32.768kHz
WATCH CRYSTAL
PRESCALER
1, 16, 256, OR 32,768
32-BIT
UP/DOWN COUNTER
TIMER2
VALUE
TIMER2 IRQ
Figure 23. Timer1 Block Diagram
Timer1 Control Register
Name:
Address:
Default value:
Access:
Function:
T1CON
0xFFFF0348
0x0000
Read and write
This 16-bit MMR configures the mode of operation of Timer1.
Table 78. T1CON MMR Bit Designations
Bit
15 to 11
10 to 9
8
7
6
5 to 4
3 to 0
Name
T1CLKSEL
T1DIR
T1EN
T1MOD
T1FORMAT
T1SCALE
Description
Reserved.
Clock source select.
00 = 32.768 kHz oscillator .
01 = 10.24 MHz/CD .
10 = XTAL2 .
11 = 10.24 MHz .
Count up.
Set by user for Timer1 to count up.
Cleared by user for Timer1 to count down (default).
Timer1 enable bit.
Set by user to enable Timer1.
Cleared by user to disable Timer1 (default).
Timer1 mode.
Set by user to operate in periodic mode.
Cleared by user to operate in free running mode (default).
Format.
00 = binary (default).
01 = reserved.
10 = hours:minutes:seconds:hundredths (23 hours to 0 hours). This is only valid with a 32 kHz clock.
11 = hours:minutes:seconds:hundredths (255 hours to 0 hours). This is only valid with a 32 kHz clock.
Prescaler.
0000 = source clock/1 (default).
0100 = source clock/16.
1000 = source clock/256. This setting should be used in conjunction with Timer1 in the format
hours:minutes:seconds:hundredths. See Format 10 and Format 11 listed with Bits[5:4] in this table (Table 78).
1111 = source clock/32,768.
Rev. 0 | Page 65 of 100
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